`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2020/10/23 18:40:10
// Design Name: 
// Module Name: alu_pcbranch
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module alu_pcbranch(
    input logic [31:0] pc_plus4,
    input logic [31:0] offset,

    output logic [31:0] pc_branch
    );

    logic [31:0] offset_ext;
    assign offset_ext = {offset[29:0],2'b00};
    
    assign pc_branch = pc_plus4 + offset_ext;

endmodule
